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Patent 2236395 Summary

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(12) Patent Application: (11) CA 2236395
(54) English Title: NON-ETCHED HIGH POWER HTS CIRCUITS AND METHOD OF CONSTRUCTION THEREOF
(54) French Title: CIRCUITS NON GRAVES DE SUPRACONDUCTIVITE A HAUTE TEMPERATURE ET DE GRANDE PUISSANCE, ET METHODE DE FABRICATION DE CEUX-CI
Status: Dead
Bibliographic Data
(51) International Patent Classification (IPC):
  • H01L 25/00 (2006.01)
  • H01P 1/203 (2006.01)
  • H03H 2/00 (2006.01)
(72) Inventors :
  • MANSOUR, RAAFAT R. (Canada)
(73) Owners :
  • COM DEV LIMITED (Canada)
(71) Applicants :
  • MANSOUR, RAAFAT R. (Canada)
(74) Agent: SCHNURR, DARYL W.
(74) Associate agent:
(45) Issued:
(22) Filed Date: 1998-04-30
(41) Open to Public Inspection: 1999-10-30
Examination requested: 2000-10-23
Availability of licence: N/A
(25) Language of filing: English

Patent Cooperation Treaty (PCT): No

(30) Application Priority Data: None

Abstracts

English Abstract





A high power superconductive circuit has a
thin film of high temperature superconductive material
on a substrate. The circuit is formed from wafers
that are placed into corresponding grooves within the
substrate and held in place by adhesive. The grooves
can be blind grooves or they can be through holes and
the wafers will have a corresponding size and shape.
The wafers include a thin film of high temperature
superconductive material and can form resonators or an
input or output. A circuit constructed in this manner
has a relatively high power handling capability
compared to circuits created by etching.


Claims

Note: Claims are shown in the official language in which they were submitted.




The embodiments of the invention in which an exclusive
property or privilege is claimed are defined as
follows:



1. A high power high temperature
superconductive circuit for passing current comprising
a substrate having a base and a top, said base having
a ground plane thereon, said circuit having an input
and an output, said top containing at least one groove
and at least one corresponding wafer comprising high
temperature superconductive material, said groove and
said wafer being sized and located so that one wafer
is located in each groove with each wafer functioning
as a microwave component when said current passes
through said circuit.
2. A circuit as claimed in Claim 1 wherein each
wafer has a thin film of high temperature
superconductive material affixed to at least a partial
thickness of substrate and each groove has a depth to
receive each wafer so that an upper surface of said
substrate forming part of said wafer is substantially
flush with an upper surface of said substrate of said
circuit when said wafer has been inserted fully into
said groove.
3. A circuit as claimed in Claim 2 wherein each
groove extends through said substrate and through a
ground plane beneath said substrate and said wafer
includes a substrate beneath said thin film of high
temperature superconductive material and a ground
plane beneath said substrate when said wafer is in an
upright position.
4. A circuit as claimed in any one of Claims 1,
2 or 3 wherein the input and output are formed from
metallized thin films.
5. A circuit as claimed in any one of Claims 1,



-10-






2 or 3 wherein the input and output are formed from
wafers respectively comprising high temperature
superconductive material located in grooves
corresponding to said wafers.
6. A circuit as claimed in any one of Claims 1,
2 or 3 wherein the input and output are made from a
thin film of gold.
7. A circuit as claimed in Claim 1 wherein an
adhesive is located to retain said wafers in said
grooves and said circuit is located in a housing.
8. A circuit as claimed in Claim 7 wherein the
adhesive is an epoxy.
9. A circuit as claimed in any one of Claims 1,
2 or 3 wherein the wafers are formed from a ceramic
material that becomes superconductive at cryogenic
temperature.
10. A circuit as claimed in any one of Claims 1,
2 or 3 wherein there are at least three grooves and at
least three corresponding wafers on said substrate.
11. A circuit as claimed in any one of Claims 1,
2 or 3 wherein there are a plurality of grooves and
corresponding wafers.
12. A circuit as claimed in any one of Claims 1
or 2 wherein the grooves are blind grooves and the
corresponding wafers are sized accordingly to fit
properly within said blind grooves so that an upper
surface of said substrate forming part of said wafers
is substantially flush with an upper surface of said
substrate of said circuit when said wafers are fully
inserted into said grooves.
13. A circuit as claimed in any one of Claims 1,
2 or 3 wherein there is at least one first wafer and
at least one corresponding first groove and at least
two second wafers and at least two corresponding



-11-




second grooves, said at least one first wafer in said
at least one groove being a resonator of said circuit
and said second wafers in said second grooves being
smaller in size than said first wafer and forming the
input and the output of said circuit.
14. A circuit as claimed in any one of Claims 1,
2 or 3 wherein the wafers are resonators.
15. A method of constructing a high power high
temperature superconductive circuit having a substrate
with a base and a top, said base having a ground plane
thereon, said method comprising the steps of forming a
plurality of grooves in said top, sizing and locating
each groove to receive a corresponding wafer
comprising high temperature superconductive material,
shaping each wafer to fit within a corresponding
groove, placing one wafer in each groove, affixing
each wafer with a suitable adhesive, adding an input
and an output to the circuit either before or after
the wafers are placed in said grooves, said wafers
being arranged in relation to said input and said
output to function as resonators when said circuit is
operational.
16. A method as claimed in Claim 15 including
the steps of forming each wafer so that it has a depth
of substrate beneath it, forming each groove to
receive each wafer so that a top of said substrates on
each wafer is substantially flush with a top of said
substrate on said circuit.
17. A method as claimed in Claim 15 including
the steps of constructing a source of wafers by
forming a thin film of superconductive material on a
substrate, said substrate having a ground plane on a
lower surface thereof, dicing said source to create
wafers of appropriate size, said wafers including a



-12-




thin film of high temperature superconductive
material, a layer of substrate and a ground plane on a
lower surface of said substrate, forming a high
temperature superconductive circuit on a substrate
having a ground plane on a lower surface thereof,
forming a thin film of gold on an upper surface of
said substrate and etching said thin film of gold t:o
form an input and an output, cutting grooves into raid
substrate, said grooves being cut entirely through
said substrate and ground plane to correspond in size
and shape to said wafers, inserting one of said wafers
in each of said grooves respectively, affixing said
wafers in said grooves using an adhesive.



-13-

Description

Note: Descriptions are shown in the official language in which they were submitted.



CA 02236395 1998-04-30
NON-ETCHED HIGH POWER HTS CIRCUITS
AND METHOD OF CONSTRUCTION THEREOF
This invention relates to a high power
super~~onductive circuit and to a method of
constructing said circuit. More particularly, this
5 invention relates to a circuit having a substrate with
one o:r more grooves formed in said substrate for
receiving one or more wafers that are arranged to
function as microwave components of said circuit.
It is known to form high temperature
10 superconductive circuits on a substrate using a thin
film of ceramic material that becomes superconductive
at cryogenic temperatures. Previous circuits are
formed by affixing a high temperature superconductive
thin film to the substrate and subsequently subjecting
15 the thin film to etching. The etching can be chemical
etching or dry etching. When chemical etching is
used, the chemical eats away that part of the thin
film that must be removed in order to form the desired
circuit. A glass plate template is used to cover that
20 portion of the thin film that is not subjected to
etching. With dry etching, a milling machine is used
to remove those parts of the thin film that must be
removed in order to leave the desired circuit on the
substrate. Both chemical etching and dry etching
25 require a large time input and both forms of etching
degrade the power handling capability of the resulting
circuit significantly. The cost of fabricating HTS
planar filters is considered extremely high in
comparison to that of conventional microwave filters
30 due to the cost of the lithographic process used to
fabricate planar high temperature superconductive
filters and the limited number of filters one can
produce from one high temperature superconductive
wafer. The use of lithographic fabrication processes
- 1 -


CA 02236395 1998-04-30
has been known to reduce the power handling capability
of high temperature superconductive filters.
It is an object of the present invention to
produce a high power superconductive circuit that has
5 high power handling capability compared to previous
circuits and has resonators formed on a substrate
without etching and without using lithographic
fabrication processes. It is a further object of the
present invention to increase the number of HTS
ZO circu.its that can be produced from one HTS wafer and
to produce HTS circuits at a relatively low cost
compared to conventional HTS circuits.
A high power high temperature
superconductive circuit is used for passing current
15 having a substrate with a base and top. The base has
a ground plane thereon and the circuit has an input
and output. The top contains at least one groove and
at least one corresponding wafer comprising high
temperature superconductive material. The groove and
20 wafer are sized and located so that one wafer is
located in each groove with each wafer functioning as
a microwave component when said current passes through
said circuit. Preferably, each circuit has a
plurality of grooves and corresponding wafers.
25 A method of constructing a high power high
temperature superconductive circuit having a substrate
with a base and a top, said base having a ground plane
thereon, said method comprising the steps of forming
at least one groove in said top, sizing and locating
30 each groove to receive a corresponding wafer
comprising high temperature superconductive material,
shaping each wafer to fit within a corresponding
groove, placing one wafer in each groove, affixing
each wafer with a suitable adhesive, adding an input


CA 02236395 1998-04-30
and an output to the circuit, said wafers being
arrancted in relation to said input and said output to
function as resonators when said circuit is
operational .
5 In the drawings:
Figure 1 is an exploded perspective view c>f
a prior art high temperature superconductive planar
filter;
Figure 2 is a perspective view showing the
10 assembled prior art filter of Figure 1 with a cover
removed;
Figure 3A shows a schematic circular high
temper°ature superconductive wafer diced into several_
smaller wafers;
15 Figure 3B shows an enlarged rectangular high
temperature superconductive wafer after dicing;
Figure 4 shows an exploded perspective view
of a filter of the present invention with a cover
removed;
20 Figure 5 is a top view of the filter of
Figure' 4 as assembled with the cover removed;
Figure 6 is an exploded perspective view of
a filter representing a further embodiment of the
present invention with a cover removed;
25 Figure 7 is a top view of the filter of
Figure' 6, as assembled, with the cover removed; and
Figure 8 is a partial exploded perspective
view of a filter having an input or output made from a
wafer in a groove.
30 In Figure 1, a prior art microstrip filter- 2
has a substrate 4 with a HTS film circuit 6 on a top
8. A complete layer 10 made out of gold is deposited
on a back (not shown) of the substrate 4 to serve as a
ground plane. The ground plane 10 can be made from
- 3 -


CA 02236395 1998-04-30
any metallized material. The patterned HTS film
consists of several resonators 12 and input and output
line; 14,16 respectively. The circuit is mounted in a
housing 18 by epoxying the ground plane 10 to a bottom
5 20 of' the housing 18. Ohmic contacts 22, 24 are
deposited the input/output lines 14, 16 respectively
to allow input/output connectors 26, 28 respectively
to beg attached to the circuit 6 using epoxy, ribbon.
bonding or other means. A cover 30 has openings 32
ZO for connecting the cover 30 to the housing 18 using
screws (not shown). The cover 30 eliminates
radiation .
Figure 2 illustrates the assembled prior art
circuit 6 with the cover 30 removed. The housing 1.8
15 has openings 33 for receiving screws (not shown) for
attaching the cover (not shown). HTS wafers are
available in the form of HTS films deposited on a l.ow-
loss dielectric substrate. The most common substrate
material in use is Lanthanum Aluminate, which has a
20 dielE~ctric constant of approximately twenty- four. In
convE~ntional planar HTS filters, lithographic
techniques are used to form a circuit pattern of HTS
film on the top of a substrate. In the process, the
film on the top 8 of the substrate 4, where no film is
25 shown in Figure 2, has been etched away from the
substrate. The ohmic contacts are formed at a latESr
stage using E-beam deposition or other means.
One problem with the prior art method of
fabrication is that, since a large portion of the HTS
30 film is etched away, the construction of a large order
filter may require the use of almost an entire HTS
wafer. The method of the present invention allows
several similar filters to be constructed from one HTS
wafer and several gold-film or copper-film wafers.
- 4 -


CA 02236395 1998-04-30
Since the cost of a gold-film wafer or copper-film
wafer is much less than that of an HTS wafer, a
considerable cost reduction can be achieved with the
use of the present invention. Additionally, the
5 proposed method eliminates the need to use any of the
etching techniques, thereby saving those costs as
well. Further, the power handling capability of t:he
circuit is not degraded with the present invention.
Figure 3A shows a large HTS wafer 34, which
10 has been diced into several small HTS wafers 36. Each
wafer 36 consists of a substrate 38 with HTS film 90
on a top 42 and a gold or copper layer 44 on a back:
(not shown) comprising the ground plane. While the
wafer- 34 is shown as having a cylindrical shape, it.
15 will preferably have a rectangular shape as less waste
will occur when dicing smaller rectangular wafers from
it. Figure 3B shows a greatly enlarged rectangular
wafer 36 after dicing.
In Figure 4, there is shown a circuit 46
20 acco~.-ding to the present invention, where a substrate
48 has input and output lines 50, 52 made out of gold
or copper patterned on a top 54 of the substrate 48.
A back (not shown) is coated with a ground plane 58
preferably made from gold or copper film. Several
25 grooves 60 are made in the substrate 48 using laser
machining or other means. The grooves have dimensions
which are slightly larger than the dimensions of small
HTS i_irst wafers 62, which preferably have been cut:
from a single large wafer, and function as resonators
30 in the circuit 46. Each wafer 62 has an HTS thin film
40 on top of the substrate 38 with a ground plane 44
on the bottom of the substrate. Preferably, the
grooves 60 extend through the substrate 48 and the
ground plane 44 and are therefore through grooves.
- 5 -


CA 02236395 1998-04-30
There are four first wafers 62 located in the four
first grooves 60 respectively making up a filter 64.
A cover has been omitted from the drawing. The fili:er
64 is assembled by attaching the ground plane 58 of
5 the substrate 48 to a housing 66 using epoxy or other
means. Several small wafers 62 are created by dicing
as described in Figure 3A and one wafer 62 is then
inserted into each of the four first grooves 60. The
wafers are attached to the housing by epoxying or
10 other means. Two connectors 68, 70 are connected
directly to the input/output lines 50, 52 respectively
using epoxy, ribbon bonding or other means. The
substrate 48 can be made from any dielectric material
having a dielectric constant of substantially twenty-
15 four. With a proper RF design of the circuit, the
substrate can be made of any other low-loss dielectric
material.
Figures 5A and 5B show a top view of the
assembled filter 64 without the cover. The use of
20 gold films for the input and output lines 50, 52 has
little impact on the quality factor of the HTS
resonators formed from the wafers 62. The method o:E
the present invention allows planar filters to be
designed using CAD techniques. The effect of the gaps
25 between the HTS films of the wafers 62 and the
substrate 48 can be minimized by the use of tuning
mechanisms. Another method of minimizing or
eliminating the effect of the gap is to fill the gap,
after assembly, with dielectric material that has
30 similar characteristics to either the substrate 38 of
the wafer 62 or the substrate 48 of the filter 64.
Figure 6 is an exploded perspective view of
a filter 72 having a circuit 74 with a cover omitted.
The filter 72 is identical to the filter 64, except
- 6 -


CA 02236395 1998-04-30
for the input/output and the use of blind grooves a.nd
the same reference numerals will be used for those
components that are identical. The circuit 74 has a
substrate 48 and ground plane 58. First blind grooves
5 76 are made in the substrate 48 by laser machining or
other means. The grooves extend only partially into
the ~~ubstrate and do not extend to the ground plane.
First: wafers 78 have an HTS film 79 on a substrate 80
with no ground plane. The wafers 78 are sized to fit
10 within the grooves 76 with one wafer in each groove.
A depth of the substrate 80 for each wafer is chosen
so that a top of the substrate 80 will be
substantially flush with the top 54 of the substrate
48 after the wafer has been attached within the groove
15 76 with the HTS thin film 79 on top of the substrate
80 lying above a level of the top 54 of the substrate
48. When blind grooves are utilized, the wafers can
be cut from a large wafer that does not have a ground
plane and, preferably has a substrate with a thickness
20 equa7_ to that required to properly fill the blind
groove in which the wafer is to be inserted. AfteY'
the substrate 48 has been attached to the housing E.6
and the wafers 78 have been affixed into the grooves
76, input and output probes 82, 84 respectively are
25 then inserted into the housing 66. The assembled
filter 72 is shown in Figure 7 without the cover. The
lengt:h of the input/output probes 82, 84 are adjusted
during the tuning process to provide the necessary
input:/output coupling.
30 In Figure 8, those components that are
identical to components of Figure 4 are described
usinct the same reference numerals. The filter is
ident:ical to that of Figure 4 except that a wafer 86
has an input or output line 88 on a substrate 90 with


CA 02236395 1998-04-30
a ground plane 92. The wafer 86 is sized to fit ini~o
a U-shaped groove 93. The line 88 is connected to
input or output connectors 94. The wafer 86 and
corresponding U-shaped groove 93 can be used for one
5 or both of the input and output. The wafer 86 and
groove 93 are shown as extending the full depth of the
substrate 48 and ground plane 58, but could both be
shallower (ie. blind grooves similar in depth to the
wafers 78 and grooves 74 of Figure 6).
10 In Figure 4, a substrate can be constructed
with a ground plane on a lower surface and a thin
metal film on an upper surface thereof. The thin
metal film will preferably be formed of gold, silver
or copper. The metal film is then etched to remove
15 all of the film except for that part of the film that
forms the input and the output of Figure 4. Grooves
are then cut into the substrate and preferably through
the ground plane. Wafers are then obtained from a
source, such as described in Figure 3A, and inserted
20 into the grooves cut into the substrate.
While it is preferable to cut the grooves
entirely through the substrate and through the ground
plane, it is possible to cut the grooves only
partially through the substrate and then to size the
25 source of wafers so that a thickness of the substrate
beneath the thin film of high temperature
superconductive material is substantially equal to the
depth of the grooves so that a top surface of the
substrate of the wafers is substantially flush with a
30 top surface of the substrate into which the wafers are
inserted. The grooves could also be cut through the
substrate but stop at the ground plane. Whenever the
grooves do not extend through the entire substrate and
ground plane, they are referred to as blind grooves.
_ g _


CA 02236395 1998-04-30
Grooves that cut entirely through the substrate and
ground plane are referred to as through grooves.
While the filter of Figure 4 uses through grooves and
the filter of Figure 6 uses blind grooves, the type of
5 groove is interchangeable. Preferably, the high
temperature superconductive material is a ceramic
material that becomes superconductive at cryogenic
temperatures.
- 9 -

Representative Drawing
A single figure which represents the drawing illustrating the invention.
Administrative Status

For a clearer understanding of the status of the application/patent presented on this page, the site Disclaimer , as well as the definitions for Patent , Administrative Status , Maintenance Fee  and Payment History  should be consulted.

Administrative Status

Title Date
Forecasted Issue Date Unavailable
(22) Filed 1998-04-30
(41) Open to Public Inspection 1999-10-30
Examination Requested 2000-10-23
Dead Application 2004-04-30

Abandonment History

Abandonment Date Reason Reinstatement Date
2003-04-30 FAILURE TO PAY APPLICATION MAINTENANCE FEE

Payment History

Fee Type Anniversary Year Due Date Amount Paid Paid Date
Application Fee $300.00 1998-04-30
Registration of a document - section 124 $100.00 1998-10-22
Maintenance Fee - Application - New Act 2 2000-05-01 $100.00 2000-04-07
Request for Examination $400.00 2000-10-23
Maintenance Fee - Application - New Act 3 2001-04-30 $100.00 2001-04-26
Maintenance Fee - Application - New Act 4 2002-04-30 $100.00 2002-04-29
Owners on Record

Note: Records showing the ownership history in alphabetical order.

Current Owners on Record
COM DEV LIMITED
Past Owners on Record
MANSOUR, RAAFAT R.
Past Owners that do not appear in the "Owners on Record" listing will appear in other documentation within the application.
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Document
Description 
Date
(yyyy-mm-dd) 
Number of pages   Size of Image (KB) 
Representative Drawing 1999-10-15 1 11
Abstract 1998-04-30 1 17
Description 1998-04-30 9 362
Claims 1998-04-30 4 143
Drawings 1998-04-30 8 138
Cover Page 1999-10-15 1 37
Assignment 1998-10-22 2 85
Assignment 1998-04-30 3 80
Prosecution-Amendment 2000-10-23 1 32
Prosecution-Amendment 2000-12-06 2 50
Fees 2002-04-29 1 37
Fees 2001-04-26 1 30
Fees 2000-04-07 1 32